|1.1||Physics at LHC||14|
|2||Theory of Semiconductor Diode Detectors||18|
|2.1||Types of Doping||18|
|2.3.1||Hole Electron Pair Production||24|
|2.4||ATLAS Diode Detector||25|
|2.4.1||Type of Silicon Used||26|
|2.5||ATLAS Diode Problems & Solutions||27|
|3||Electronic Devices Used||29|
|3.1.1||Extraordinary Measurement Care||30|
|3.1.2||High Resistance DUTs||30|
|3.1.3||Low Resistance DUTs||31|
|3.2.2||Accurate Measurement Set-up||35|
|3.2.5||Definition and Grouping of Variables||38|
|3.2.6||Calculation of Variables from the Complex Impedance||38|
|3.2.7||Choice of Mode||39|
|3.2.14||Notes on Parasitic Effects||43|
|4||Computer Code Used||46|
|4.1||The Main Code||47|
|4.2||The Keithley Code||49|
|4.3||The HP Code||51|
|5.1||The Experimental Set-up||54|
|5.1.1||The Faraday Chamber||54|
|5.1.2||The Probe Station||56|
|5.1.3||Assembly of the Electronics||56|
|5.2||The Experimental Procedure||56|
|5.2.1||Testing the Apparatus||57|
|5.2.2||Taking the Measurements on Silicon Devices||58|
|6.1||Method for Data Analysis||61|
|6.2||Simple Test DUTs||63|
|6.2.1||The 100kOhm Resistor DUT||63|
|6.2.2||The 1 MOhm Resistor DUT||64|
|6.2.3||The 1 MOhm Resistor & 10 pF Capacitor in Parallel||65|
|6.2.4||The 500 MOhm Resistor & 10 pF Capacitor in Parallel||66|
|6.3||Silicon Test DUTs||67|
|6.3.1||The First Silicon 5 mm Square Diode||67|
|6.3.2||The Second Silicon 5 mm Square Diode||68|
|6.3.3||The Third Silicon 5 mm Square Diode||69|
|6.4||Silicon DUTs Before and After Gluing||70|
|6.4.1||Glass Platform with Unglued Silicon 5 mm Square||70|
|6.4.2||The Glued Silicon 5 mm Square Diode on Glass||71|
|6.4.3||The Fourth Silicon 5 mm Square Diode||72|
|6.4.4||Silicon Strip 1||73|
|6.4.5||Silicon Strip 2||74|
|7.1||Measurement of Depletion Voltage||75|
|7.2||Computer Code Development||75|
|A||Accuracy of the HP4284A||78|
|B||Labview Coding for Experiment Control||80|
|1.1||The ATLAS detector||15|
|2.1||The p-n junction with zero applied bias ||21|
|2.2||Current vs Potential Difference across a diode ||22|
|2.3||The SCT detector module ||25|
|2.4||The SCT detector module separated into its components ||26|
|3.1||Coaxial cable circuit ||30|
|3.2||Triaxial cable circuit ||31|
|3.3||Basic Keithley circuit||33|
|3.4||HP4284A four terminal set-up ||35|
|3.5||HP4284A basic measurement circuit layout ||36|
|3.6||Capacitance circuit mode selection ||40|
|3.7||Effective region for each measurement range ||42|
|3.8||Effective DUT seen by the Keithley||43|
|3.9||Effective DUT seen by the HP4284A||44|
|3.10||Purpose-built guard box||45|
|5.1||The set-up (exterior)||55|
|5.2||The set-up (inside the Faraday chamber)||55|
|5.3||The device to hold awkward DUTs||57|
|5.4||The glued diode set-up||59|
|6.1||The format of the output data||62|
|6.2||A 100 kOhm resistor||63|
|6.3||A 1 MOhm resistor||64|
|6.4||A 1 MOhm and a 10 pF caoacitor in parallel||65|
|6.5||A 500 MOhm and a 10 pF capacitor in parallel||66|
|6.6||The silicon 5x5 diode No.1||67|
|6.7||The silicon 5x5 diode No.2||68|
|6.8||The silicon 5x5 diode No.3||69|
|6.9||The unglued silicon 5x5 diode on glass||70|
|6.10||The glued silicon 5x5 diode on glass||71|
|6.11||The silicon 5x5 diode No.4||72|
|6.12||The silicon 10 micron strip detector (4 cm long)||73|
|6.13||The silicon 10 micron strip detector No.1||73|
|6.14||The silicon 10 micron strip detector (3.8 cm long)||74|
|6.15||The silicon 10 micron strip detector No.2||74|
|B.1||Test4ThreeFrequencies.vi (part 0)||81|
|B.2||Test4ThreeFrequencies.vi (parts 1, 2 & 3)||82|
|B.3||VICSubVi.vi (part 0)||83|
|B.4||VICSubVi.vi (part 1)||84|
|B.5||VICSubVi.vi (part 2)||85|
|B.6||VICSubVi.vi (part 3)||86|
|B.7||VICSubVi.vi (part 4)||87|
|B.8||VICSubVi.vi (parts 5 & 6)||88|
|B.9||Kth-SvMi_Main.vi (part 1)||89|
|B.10||Kth-SvMi_Main.vi (parts 2 & 3)||89|
|3.1||Resolution of Keithley readings||32|
|3.2||Definition of variables||38|
|3.3||Formulae for the interchange of variables||39|
Apparatus was assembled to measure the capacitance of, and
current drawn by, a silicon strip diode detector over a range
of applied reverse biased voltages.
It was tested by using a variety of simple circuit components
and simple diodes whose characteristics were known.
The depletion voltage of the diodes was measured using values
of capacitance measured over the range of voltages supplied.
National Instruments Labview software was used to control the measurements in an automated routine designed, in part, by this author.
Capacitances were measured using a digital LCR meter manufactured by Hewlett Packard (HP2842A). These values were taken at a range of LCR meter voltages and at frequencies of 10 kHz, 100 kHz and 1 MHz. Voltage biases were supplied and currents were measured using a Keithley 237 (a precision voltage and current supply).
Two different silicon strip devices were measured. The depletion voltage was measured using one strip from each device and found to be 20±1 V for the first and 57±1 V for the second. The corresponding leakage currents were 4.5 nA and 1.43 µA.
One silicon diode was measured before and after it was glued to a base plate with thermally conducting glue. The gluing did not effect the depletion voltage significantly. It did, however, effect the leakage current. This affect was greater at higher voltages.
No portion of the work referred to in this thesis has been submitted
in support of an application for another degree or qualification of
this or any other institute of learning.
Copyright in text of this thesis rests with the author. Copies (by any process) either in full, or of extracts, may be made only in accordance with instructions given by the author and lodged in the John Rylands University Library of Manchester. Details may be obtained from the librarian. This page must form part of any such copies made. Further copies (by any process) of copies made in accordance with such instructions may not be made without the permission (in writing) of the author.
The ownership of any intellectual property rights which may be described in this thesis is vested in the University of Manchester, subject to any prior agreement to the contrary, and may not be made available for use by third parties without the written permission of the University, which will prescribe the terms and conditions of any such agreement.
Further information on the conditions under which disclosures and exploitation may take place is available from the Head of Department of Physics and Astronomy.
The author was educated at Rishworth School in West Yorkshire before
joining the Department of Physics at the University of Manchester in 1993.
Here the author gained a second class Bachelors Degree with honours
in Physics with Technological Physics before joining
the High Energy Particle Physics Group in 1996.
The author goes on to study for the degree of Doctor of Philosophy in High Energy Particle Physics at the University of Liverpool.
I thank Dr Ian Duerdoth, Dr Steve Snow and
Mr Julian Freestone for their technical assistance.
I thank Katy Payne for her support, her spelling and her grammar.
I wish to thank my family and my friends for their patience.
I also wish to thank Lloyds Bank for their understanding.
Physics at LHC
Theorists are dreaming up ideas continuously trying to describe nature.
In particle physics,
experimentalists are trying to devise ways to test these theories.
The Large Hadron Collider has been planned and
its components are currently being put together.
LHC proposes to accelerate proton bunches to collide
with each other at a centre of mass energy of 14 TeV.
ATLAS is one of the experiments being developed for LHC.
The characteristics of ATLAS's silicon components
require the experiment to run with a maximum period of 25 ns
between bunches of protons crossing.
ATLAS will consist of a solenoid and air-cored toroids (all super-conducting) a muon spectrometer, hadronic and electro-magnetic calorimeters both forward and barrel. It will have an inner detector with straw, silicon pixel and silicon strip detectors. A schematic of ATLAS is shown in figure 1.1.
Figure 1.1: The ATLAS detector
ATLAS will investigate CP violation in b physics, the top quark and
compositeness of fermions.
It also hopes to look for SUSY, Higgs and heavy W and Z type bosons.
Manchester University is currently involved with one ATLAS project
which is split into two areas.
The first is the design of thermal imaging for
silicon strip modules and is not covered by this thesis.
Manchester is also involved with the gluing assembly of the forward
silicon strip modules for which this research will serve a purpose.
This thesis describes the methods of use, and results taken, from
a silicon module probe station.
The measurements of capacitance and leakage current have been tested
on progressively more complex circuits and ultimately on silicon diodes.
This thesis also looks at the results from the gluing process.
Chapter 2 presents the basics of semiconductor physics
with silicon detectors in mind.
General electronic properties are discussed and
a method for measuring depletion voltage is described.
Chapter 3 contains the information required to introduce the reader to the workings of the Keithley 237, the HP4284A, and the guard box which was constructed here. These devices are the major hardware of this project and much work has gone into the understanding of them.
Chapter 4 covers the computer interfacing with the devices above. To operate these it was necessary to write computer code. Both the Keithley 237 and the HP4284A came with code to run in Labview for remote operation so this language
seemed the most suitable to continue with. Some of the more important features of the code are explained in this chapter.
Chapter 5 shows the experimental set-up and discusses the practical aspects of obtaining data for leakage current and depletion voltage measurements.
Chapter 6 presents data for the examination of the probe station's behaviour. It then goes on to show the method for extracting values of depletion voltage and leakage current. Finally, chapter 6 presents the analyses of data from basic silicon diodes, glued diodes and strip diodes.
2 Theory of Semiconductor Diode Detectors
This thesis reports the measurement of leakage current and depletion voltage
in silicon strip detectors.
The essentials of semiconductor physics are reviewed in sections 2.1 and 2.2.
A basic version of the diode detector is described in section 2.3.
Section 2.4 discusses the ATLAS diode detector's key points.
2.5 discusses some of the difficulties encountered
during the research and development of the ATLAS detectors.
There is a choice of semiconductor that can be used.
ATLAS has decided to use silicon.
Types of Doping
Doping is a process carried out on an intrinsic semiconductor.
An intrinsic semiconductor has a crystal structure which is as near
to pure as possible.
There are two types of doping. One of these creates an electron rich crystal,
and the other an electron deficient crystal.
The doping process is where an impurity is set into an intrinsic semiconductor
(ie silicon), replacing one of its silicon atoms with that impurity.
The material produced by substituting a group V element is said to be n-type
and the element replacing the silicon is called a donor.
The material produced with a group III element is p-type
and the substitution element is an acceptor.
The number of donors in n-type exceeds the number of acceptors
and therefore the material contains more electrons than the pure crystal.
In p-type the number of acceptors exceed the number of donors and so the
material has an excess of `holes'.
To understand the diode, it is useful to imagine that it is possible
to bring the two types of doped semiconductor together
and form a continuous crystal.
(In reality a layer of one type of silicon is allowed to diffuse across the
other making a gradual change from n-type to p-type).
At this new junction the electrons in the n-type
region `see' the holes in the p-type.
If the electrons move into these holes, they bind.
These electrons are no longer free to move, except for a small dissociation.
The electrons are now in the valence band,
an energy level approximately 1 eV more stable than a freely conducting band.
This is clearly an energetically favourable situation.
However, as the electrons move across to these holes a potential builds up.
At some point the energy required to move the electrons to the holes
against this potential exceeds the energy difference between the two states.
The p-n junction then forms a steady state.
The steady state contains a depletion region.
This is a region with no free charge carriers.
All the electrons have annihilated with all the holes in this region.
The depletion region can be increased in size
by the application of a reverse bias,
that is a potential difference applied across the junction
with the n-type most positive.
Assume the number of acceptors in the p region per unit cross-sectional area does not vary with depth (x) and the same for the donors in the n region (figure 2.1 a). In this case, the charge density varies as shown in figure 2.1 b. Notice the lack of free charge carriers around the junction (the depletion region).
Figure 2.1: The p-n junction with zero applied bias
Due to the movement of electrons and holes to form the equilibrium, the charge density is
where NA is the number of acceptors and ND is the number of donors per cubic metre. This can be seen in figure 2.1 c. Integrating this gives the electric field (figure 2.1 d),
Finally, integrating again shows the voltage profile across the junction,
shown in figure 2.1 e. Given that the net charge in the diode is zero the electric field on both sides of the diode must cancel,
Thus the depletion depths wn and wp are:
When a potential difference VBias, is placed across the diode one way
it conducts well.
Placed the other way it insulates well (except when breakdown occurs).
The depletion region is highly resistive compared to the rest of the silicon,
so nearly all the potential difference drops across this region.
If a positive potential difference, which is greater than
needed to match and remove the depletion layer, is applied across the diode
then the diode conducts and is said to be forward biased.
If, on the other hand, the diode is reverse biased
the applied potential difference is added to
and the depth of the depletion layer increases, see figure 2.2
for the I-V characteristics.
This figure shows the current drawn
by a diode when different
biases are applied. In the forward bias region, with a potential difference
exceeding , the diode conducts. In the reverse bias region it
insulates. However, whilst insulating there is a very tiny current
drawn by the diode. This is called the leakage current and is too small to be
Figure 2.2: Current vs Potential Difference across a diode 
The sizes of the depletion layers are now given by ,
When the diode is reverse biased it has a capacitance.
This is due to the lack of charge carriers turning the depletion region
into an insulating dielectric.
Its capacitance varies with its geometry and the relative permittivity
(epsilon) of the semiconductor.
At room temperature (epsilon) for silicon is 11.8 .
The diodes covered in this thesis can all be approximated
to some form of parallel plate geometry.
The capacitance of a parallel plate capacitor is
where A is the area of the plate and D is the separation . We can apply this to the diode. The build-up of charge due to the equilibrium settled at translates into a surface charge on the capacitor,
Thus the capacitance of the diode in reverse bias mode per unit area is
If the total number of donors and acceptors is N, where , this reduces to
It can now be seen that the capacitance varies with voltage:
This is a property with which to measure VDep, the depletion voltage.
The silicon detector devices are about 12 cm long by 6 cm wide and are
made up from silicon trapezium wafers measuring approximately 6 cm square.
Their bulk is n-type.
To these, micro-strips of p-type have been added.
The strips are typically 10 microns across and travel along the length of each
6 cm block.
Due to the small size of the p-type strips, the number of acceptor sites per
unit volume is increased by a large factor and the substrate is called
Any depletion region in the p+ -type
is much smaller than in the n-type.
This allows full depletion of the n region.
The relationship between the bias voltage VBias and
the size of the depletion, x (where x = wn + wp),
for a silicon strip detector is given by
In the notation of this thesis, taking into account the p+ -type (meaning that wp << wn) , this becomes:
from equation 2.7, where N is the number of carriers
per unit volume (section 2.2.3).
Hole Electron Pair Production
When an energetic charged particle travels through a depleted
region it promotes electrons into the conduction band and consequently
it creates holes in the valence band.
The probability of recombination is small
as all the acceptor and donor sites are occupied.
The electron and hole move in opposite directions
towards the edge of the depleted region.
This is because the depletion region sustains an electric field.
If the diode is fully depleted the electron and hole will not
find partners to annihilate with.
Being influenced by the potential difference they will move.
Their motion constitutes a current towards the bias voltage supply.
It is this that can be detected by the detector's electronics.
There are many electron hole pairs produced per particle
due to the amount of energy deposited,
about 25000 in 300 microns of silicon for a minimum ionising particle.
ATLAS Diode Detector
The ATLAS SCT Diode Strip Detector is shown in figure 2.3.
The strips, located on the trapezium silicon wafers, travel down the page.
Figure 2.3: The SCT detector module
It consists of three sections (see figure 2.4): the hybrid, which contains the electronics (top left); the beryllia plate, for thermal conductivity and mechanical strength (bottom); and the silicon strip diodes (top right).
Figure 2.4: The SCT detector module separated into its components.
Type of Silicon Used
The silicon used here is not electronics grade.
It has been specially manufactured by Hamamatsu for high resistivity.
Resistivity is increased by using a lower doping concentration
to that of ordinary silicon.
The detector's size is limited by the size of industrial ingots.
These are circular and about 10 cm in diameter.
The detector has two pairs of silicon wafers, one on each side.
They are rotated by 40 mrad with respect to each other.
If two particles pass through one strip at two different places
there will be two readings the location of which cannot be determined.
The stereo angle serves to locate how far along the strip each particle passes,
with some lesser accuracy than the primary coordinate.
The accurate reading is chosen to be the one perpendicular to the magnetic field
and the direction of motion.
This is because the curvature of
the particle's flight path,
due to the magnetic field, leads to the measurement of its momentum.
The smallness of the skew angle ensures that both plates
get an accurate reading of the important component of the particles position.
Beryllia is the compound beryllium oxide, BeO.
It was chosen as the skeletal component of the device as it has low Z,
has a long radiation length, is of low density, is mechanically stable
and conducts heat well.
The hybrid is the part of the module where the preliminary electronics are
The electrical activity in the hybrid generates a lot of heat
so it is separated from the detector except for a small junction where
the cooling pipe has access.
This limits the transfer of heat to the silicon strips.
In doing so, it reduces the effects of radiation damage (section 2.5.3).
ATLAS Diode Problems & Solutions
The radiation level through the silicon detectors
is expected to be 2.2×10¹³ 1 MeV neutron equivalents
per square cm per year .
It is at energies of about 1 MeV that neutrons start to damage silicon.
Therefore the silicon detectors must stand up to severe radiation
There has been much research into the effect
of radiation on silicon detectors.
It seems that high fluences cause problems.
The bombardment of silicon atoms by neutral and charged particles
in the crystal causes the structure to change.
This is termed "Bulk Damage".
It has been observed that, during irradiation,
the n-type region mutates gradually into p-type.
This effective dopant concentration change may result from three processes:
donor removal, prompt acceptor creation,
and the creation of electrically inactive regions
which after a time become active , .
The latter is known as reverse annealing.
This donor removal, or reduction in n-type carriers,
has the disadvantage that the bias voltage must be increased
as time goes by, to create a full depletion (see equation 2.15).
Also, when the silicon reaches the stage where it becomes
all p-type then it is impossible to create any depletion.
Further research into the problem of annealing found that at low temperatures
the reverse annealing caused by radiation, was affected.
Exposing the silicon at low temperature reduces the damage.
Simulations at temperatures of 0°C, -5°C and -10°C
found large differences in operation between -5°C
and 0°C .
However, even after irradiation the silicon must be kept cool.
The reverse annealing process mentioned above is the only long term effect.
It reintroduces itself at higher temperatures
and is not beneficial as the short term annealing can be.
This thesis does not approach the method for low temperature testing.
For such testing, methods must be incorporated to reduce the level
of water vapour in the gas surrounding the silicon.
Below about 5°C, when using air from the surroundings,
condensation starts to form on the apparatus.
3 Electronic Devices Used
Measurements of capacitance and current, for a range of voltages, are required
to determine the leakage current and depletion voltage of the diodes which
will ultimately be measured.
Equation 2.13 provides the relationship needed between VBias
and C, which changes at VDep.
This chapter aims to introduce the workings of the electronic devices used in this project. These devices constitute a large part of the full experimental set-up, which is described in chapter 5.
The LCR meter and the voltage supply are used simultaneously to save time. The Keithley 237 supplies a voltage across the sample, which will ultimately be the silicon detector wafer. While this voltage is supplied there is a delay and then two measurements are made. The Keithley 237 measures the current, then the LCR-meter measures the complex impedance.
The Keithley Model 237 High Voltage Source Measure Unit , Hewlett Packard HP4284A Precision LCR Meter  and the sample load being measured will hereafter be referred to as the Keithley, the HP, and the DUT respectively. (DUT stands for device under test).
The Keithley is a precision device supplying high voltage
whilst measuring current or vice versa.
It was chosen for its voltage-supplying capabilities.
It can deliver a potential difference across its terminals of up to 1100V.
At the same time it measures the current drawn through the DUT which is placed across these terminals.
It is capable of measuring currents between 10 fA and 100 mA when sourcing less than ±110 V.
The Keithley is a complex combination of digital and analogue electronics.
These components have been conveniently separated by the manufacturer
to avoid interference between the two sections.
Extraordinary Measurement Care
Due to the nature and range of measurements that the Keithley is required
to cope with it is necessary to protect against bad results
caused by losses in the cables.
The main losses are those associated with low resistance DUTs
and very high resistance DUTs.
Measurement of diode characteristics can be prone to both.
High Resistance DUTs
In the high resistance DUT case, the resistance, RL,
of the insulative dielectric in standard coaxial cable is of the order
100 GOhms (see figure 3.1).
Figure 3.1: Coaxial cable circuit
If the DUT's resistance is 1 GOhm this will cause leakage of about 1% through the coaxial cable. It is therefore necessary to use triaxial cable (figure 3.2).
Figure 3.2: Triaxial cable circuit.
Triaxial cable has one core and two concentric shields. The central core carries the supply voltage. The innermost shield carries the same potential to within ±2 mV. This is linked to a buffered voltage supply in the Keithley. The outermost shield is connected to earth.
Only a small potential difference is present in the cable
between the inner shield and the core.
This drastically reduces the parallel current loss through the cable's
cladding ie there is no leakage current through the cable's dielectric.
The low potential end does not require such shielding.
Low Resistance DUTs
The Keithley constantly monitors and readjusts its output.
During a standard ("Local Sense") measurement,
the terminal potential difference is measured and
the result is fed back to the voltage source.
The consequence is that the terminals are continuously monitored
and a highly accurate potential difference is produced across them.
However, when a measurement of a low resistance DUT is taken,
the cables will see a significant potential difference across them.
This will obviously reduce that seen by the DUT.
To combat this a "Remote Sense" option is supplied.
A triaxial cable identical to the one connected to the
high potential terminal is added.
This time the core is linked directly from the feedback circuit
to the high potential end of the DUT.
If the low potential end is connected using a triaxial cable
inner shield can be used to carry the low potential sense terminal to the DUT's low potential end. The remote feedback circuit is then complete (see figure 3.3).
Figure 3.3: Basic Keithley circuit
The resolution of the Keithley depends on the compliance
(compliance is the term used by Hewlett Packard to mean current limit,
see section 3.1.6).
This dependance is shown in table 3.1.
|1 nA||100 fA|
|10 nA||1 pA|
|100 nA||10 pA|
|1 µA||100 pA|
|10 µA||1 nA|
|100 µA||10 nA|
|1 mA||100 nA|
|10 mA||1 µA|
|100 mA||10 µA|
Table 3.1: Resolution of Keithley readings
The voltage supplied can be varied from -1100 V to +1100 V.
This is in steps of 100 uV for less than ±1.1 V,
1 mV for less than ±11 V,
10 mV for less than ±110 V, and
100 mV for less than ±1100 V.
A compliance facility is installed to protect the circuitry of the DUT.
In its voltage source case it is set to limit the current output level.
A request voltage will only be supplied if this compliance is not exceeded.
If it is, the compliant current will be supplied.
Setting the compliance sets the range at which a measurement is displayed.
For some DUTs the compliance needs to be large, but some measurements
may require smaller scales.
In these cases the autorange function is used.
Autorange causes the Keithley to automatically select its measurement range,
and thus its compliance, to adapt to currents smaller than
one ten-thousandth of the DUT's compliance at that time.
In order to average the results, the filter function can be used.
This allows an average of 2, 4, 8, 16 or 32 readings.
Its only disadvantage is that it consumes time for each progressively more precise setting.
This option affects the resolution of the reading
as it is taken from an analogue to digital conversion.
The longer the integration time (to a maximum of the period of the mains power
supply) the broader the bandwidth and therefore the better the measurement
The HP is a device for measuring complex impedances over a range of frequencies
and displaying them in a variety of formats.
It is needed to measure the capacitance of the DUT.
An AC current is sent through the DUT.
Its complex impedance is calculated by comparing the amplitude and phase of
the AC voltage across DUT with that of the AC current passing through it.
The HP measures impedances in the range 0 Ohms to 100 MOhms,
whether inductive, capacitive or resistive.
A capacitance can be measured with an accuracy of ±0.05% while
a dissipation factor can be measured with an accuracy of ±0.0005.
The HP can be set to automatically switch to
the most appropriate scale for measurement.
Accurate Measurement Set-up
For accurate measurement the "Four Terminal" set-up is recommended.
This is shown in figures 3.4 and 3.5.
Other set-ups are referred to in the manual .
Figure 3.4: HP4284A four terminal set-up
Figure 3.5: HP4284A basic measurement circuit layout
Figure 3.5: HP4284A basic measurement circuit layout
A test current is produced through a 100 Ohm resistor. This passes down the centre of one metre of coaxial cable (Hcur). It is met by the centre of another metre of coaxial cable (Hpot) connected to a high impedance voltmeter. Both are connected to the "high potential" end of the DUT.
On the other side of the DUT is a virtual earth created by an amplifier controlled oscillator. The input impedance of the amplifier is large and so essentially no current passes the metre of coaxial cable (Lpot). The current is directed through an ammeter and the oscillator via one meter of coaxial cable (Lcur) into the outer of the coaxial cable. All four shields from the cables are connected to the chassis at the DUT end. This allows the two `pot' terminals to complete their circuits and allows the current to return to the first oscillator.
The magnetic fields created by the current carried by the cables cancel
and so the cables are free of inductance.
This is due to the equal and opposite currents in the shield and the centre.
The accuracies given in section 3.2.1 are for certain variables and
certain circuit set-ups. These are conservative estimates and can be vastly
improved by careful apparatus construction, choice of operation
(section 3.2.2) and choice of mode (see section 3.2.7).
To calculate the accuracy in the readings,
many parameters have to be considered.
There are errors relating to the impedance of the device, the cable length,
the frequency and the temperature.
The manual gives the method for calculation of all scenarios .
The accuracy for the set-up used in this thesis is calculated
in appendex A.
This yeilds an accuracy for C and D of 2 ppm for a 10 pF capacitor
This is the size of capacitances encountered in this thesis.
Two matched variables (see section 3.2.5) are calculated
from the complex impedance.
These are displayed in a small text box.
The basic setup is also visible in this box.
This includes the test signal voltage, the test signal frequency, the range,
the bias (not used in this thesis), the integration time and a series of menus.
are used for front panel operation.
Definition and Grouping of Variables
The variables, which are measurable, are listed in Table 3.2.
||Z|||Modulus of complex impedance (Ohms)|
||Y|||Modulus of complex admittance (Ohms)|
|Rs||Series Resistance (Ohms)|
|Rp||Parallel Resistance (Ohms)|
Table 3.2: Definition of variables
These variables are paired off as follows: Cp&D, Cp&G, Cp&Rp, Cs&D, Cs&Q, Cs&Rs, Lp&D, Lp&Q, Lp&G, Lp&Rp, Ls&D, Ls&Q, Ls&Rs, R&X, Z&(Rad/Deg), G&B, and Y&(Rad/Deg).
The `p' and `s' subscripts refer to the type of measurement mode selected.
These are described in section 3.2.7.
Calculation of Variables from the Complex Impedance
Table 3.3 below, shows a list of formulæ
to change between the different variables displayed by the HP.
Table 3.3: Formulæ for the interchange of variables
Choice of Mode
Pairs of variables are grouped together in two modes.
The choice of mode depends on the type of circuit being measured.
In figure 3.6 two basic circuits are shown.
In the top circuit the parallel resistance has the most significant effect.
In the bottom circuit the series resistance has more influence on the readings.
This is due to the value of the reactive impedance of the capacitor
High impedance capacitors cause more current to flow through the resistor,
and reduce the potential drop across Rs.
Low impedances capacitors increase the voltage seen across the resistor,
Rs, and less current is drawn through Rp.
Figure 3.6: Capacitance circuit mode selection
The test signal can be varied from
5 mVrms to 2 Vrms
or from 50 µArms to 20 mArms.
It can also be varied from 20 Hz to 1 MHz in 8610 frequency settings.
The HP has many measurement ranges shown on the ordinate axis in
In this figure the areas of good measurement are shown.
Using the autorange setting the most effective range is chosen automatically.
See fig 3.7 for these operating ranges.
The HP recognises when it is no longer able to measure correctly,
due to large impedances or bad range settings,
and displays an error message.
Figure 3.7: Effective region for each measurement range
The trigger command forces the HP to make a measurement.
It can be triggered internally, externally,
via the GPIB Bus (HP-IB) or manually.
A delay can be set halting any activity from 0 to 60 seconds.
This delay is between the trigger and the measurement.
As with the Keithley there is an integration time.
This is for analogue to digital conversions.
A long integration time lengthens the time required for each measurement,
but returns a more precise measurement.
An averaging function can be used. It allows averaging of 1 to 256 results.
Again, higher accuracy increases measurement time.
Notes on Parasitic Effects
Circuit analysis of a single component
is only first order if it is modelled as one component.
In practice there are many stray capacitances and inductances present.
These can cause precision devices such as the Keithley
and the HP to oscillate.
The HP requires 30 minutes warm-up time.
A guard box was constructed to protect the two devices from damaging
and interfering with each other.
The circuit diagram for the guard box is shown in figure 3.10.
The HP must not have, for any length time,
a DC potential across any of its terminals.
The Keithley, which is measuring small currents,
does not `want to see' the test signal of the HP.
To give good current readings the Keithley must be
separated from the test signal.
This was achieved by placing resistors 330 kOhms in series with the
DUT at both ends.
The effective circuit seen by the Keithley is shown in figure 3.8.
Figure 3.8: Effective DUT seen by the Keithley
To isolate the HP from the bias voltage, supplied by the Keithley, four 1 µF capacitors were connected in series with all four coaxial cables from the HP. The capacitance of the devices measured in this thesis are of the order 10 pF. The effective circuit seen by the HP is shown in figure 3.9. The resulting effect of the 1 µF capacitors on the measured capacitance is about 20 ppm.
Figure 3.9: Effective DUT seen by the HP4284A
An additional 1 µF capacitor was placed between the Keithley "output HI" and the chassis. This was to allow any diminished signal to pass through a "high frequency short circuit". The RC time constant value of this is 0.3 seconds. A delay must be placed when a new bias voltage is selected. This is set via remote control.
Figure 3.10: Purpose-built guard box
4 Computer Code Used
The program codes listed in this chapter
are used to operate the HP and the Keithley via remote control.
The higher level programs are listed in appendix B.
Icons to the right of some of the descriptions below correspond
to these diagrams.
The programs allow many measurements to be taken with many different
settings and ranges whilst the operator is not present.
Using these Labview programs the user can operate the HP and Keithley with
greater ease and less direct contact.
This is a vast improvement on the front panel operation of the two devices.
The major advantage, however, is the ability to store data, adjust data
and move data via the ethernet.
The labview programming interface is picture-based.
There are two displays, one of which has a "circuit"
type view and the other a user-designed "front panel" interface.
These are displayed in two windows.
The circuit view shows the operation of the program.
Here, icons are linked together by wires to either other icons,
starting points or terminations.
Each wire can carry information, from logic values up to clusters of arrays,
numbers, bits and bytes.
The front panel interface is used to enter the values of the starting points
and display the values of the terminations.
It can display numbers, strings, clusters, graphs of many types, dials, knobs,
Understanding how a program runs is a relatively easy task.
There is an option to view the program as it is running by animation in the
The values of the data carried by the wire can be displayed by using a
A probe produces a window which displays the data on a wire chosen by the user.
The Main Code
This section covers the actions of the high level, "front panel", programs.
These are the programs that the user deals with directly.
They call the other pieces of code as and when required.
The Controlling Program to Test Three Frequencies
This program is named "Test4ThreeFrequencies.vi".
Figures B.1 and B.2, in appendix B,
show the layout of this program.
It is designed to run the Voltage, Current and Capacitance Subroutine,
"VICSubVi.vi" below, for three frequency settings.
It allows the user to choose these frequencies.
The user must specify whether current and/or capacitance is to be measured,
what voltage range, the number of steps and whether a logarithm scale
A caption facility is also present to tag to the three sets of readings.
All the data gathered are mailed with the captions, as three separate files, to an email address. These files carry the data for each frequency. All the information is saved to a log file on the Macintosh in case of a bad mail connection.
This file is the major controlling section of the whole operation. It can be used on its own or with a controlling labview program such as "Test4ThreeFrequencies.vi". A previous version was designed by Julian Freestone  which cannot be controlled
by a separate program and does not mail the results. These programs are similar in most other aspects of their performance but rather different in their encoding.
The program determines which measurements are to be taken and what scale is required from the front panel or the controlling program. It then sets up the header for the data files which will be sent and recorded (figure B.3). Following this the program requires the probe not to be in contact with the DUT if an "open circuit value" has been requested (figure B.4). If it has, the requested results are then taken (using main Keithley and HP operating codes, below). They are then added to a register (figure B.5). The program then requests the probe to be placed in contact with the DUT (figure B.6). Readings with a zero bias are then taken as before and registered (figure B.7). An incremental loop is run where the voltage changes between each reading. This terminates after a set number of readings and all data is duly registered (figure B.8 top). Finally the data is sent via email (figure B.8 bottom).
The code relays the current by using the following procedure and code listed in section 4.2: the Keithley is reset, then the basic configuration is invoked with a 1 mA current compliance. It is set to supply voltage and measure current. Its autorange is activated. It is set to average 32 readings, to integrate over 20 ms, to sense remotely and is set not to sweep. It is also set to work within the 1100 V range. The Keithley is taken off stand-by mode (section 4.2). The voltage is sent and the Keithley is triggered to supply this. There is then a 20 second delay to allow the electronics to settle. The voltage and current are then read. Finally the value of the current is passed back to the calling routine.
Firstly the HP is reset. Then the basic configuration is set up. After this the aperture is set, which adjusts the integration time and averaging rate. Next, a single reading is made in accordance with the type of reading passed. Finally the HP is reset.
During the set-up autorange is switched on, the cable length is set to 1m
and the integration time is set to medium.
The code returns two readings with double precision.
The Keithley Code
The Keithley's GPIB address is taken and the code requests that the Keithley take a measurement. The measurement is returned in the first two arrays in a cluster of arrays. Both current and voltage are returned in ascii format.
The Code for Setting the Aperture
The aperture is a Hewlett Packard term meaning the precision setting.
This code sets the averaging rate (0 to 255 times) and the integration time
(short, medium or linecycle) of the HP.
The Email Function
This function sends an email message containing
the results in the form of a string to a specified email address.
It uses a TCP/IP link to port 25 of a computer at a specified IP address.
This function is not very portable.
All other code used is standard in the full installation of Labview.
5 Experimental Procedure
Two things are recorded in this chapter.
Firstly, the assembley of the individual components is described.
The second section describes the procedure for testing the set-up and
measuring the silicon detectors.
The Experimental Set-up
With the information from chapter 3 the experimental set-up can
be explained with a black box approach.
A diagram of the apparatus can be seen in
figures 5.1 and 5.2.
The apparatus in figure 5.2 is that which is located in the Faraday
The Faraday Chamber
The Faraday chamber serves two purposes.
Firstly, since it is made of metal it shields the probes inside from
external electrical interference.
Secondly, it is opaque.
A dark environment is required as light incident on the silicon
promotes its electrons into the conduction band.
This light frees electrons in the depletion region and thus spoils
any results taken.
Figure 5.1: The set-up (exterior)
Figure 5.2: The set-up (inside the Faraday chamber)
The Probe Station
This is an elecrtonically assisted x, y movement station with a vacuum chuck
fitted to it.
It has a metal plate where the silicon diode is able to be held by suction.
Around the vacuum chuck is a raised steel annular disk.
This is used to mount magnetic-based probes on.
These probes are small x, y, z microscopic movement devices
which allow the probe needle to be moved small distances with ease.
As the probes have their own x, y, z movement the x, y movement of the
probe station is not required.
Above the vacuum chuck is a microscope with lighting supplied by optical fibre. This is used to find the right position for the probe needle.
A Peltier effect device is located under the vacuum chuck.
Its hot side is irrigated with water to cool down the DUT.
The cooling device was not used in this project.
Assembly of the Electronics
Figure 5.1 shows the data link between the various
electronic devices and their routes to the mains.
The Keithley's three triaxial cables and the HP's four coaxial cables pass into the Faraday chamber. None of the wires are in contact with the metal of the chamber. The location at which the cables pass through into the chamber is guarded against any leakage of light.
Inside the chamber the seven cables are connected to the purpose-built
The outer edge of this box is connected to the Faraday box to earth it.
The two coaxial cables leaving the box go to the probe station.
The high potential end goes to the probe needle and the low potential end
goes to the metal vacuum chuck.
The Experimental Procedure
The experiment is in two sections, the first is the testing
of the apparatus developed, using circuits whose behaviour can be predicted.
The second section is the taking
of measurements on the silicon strips and silicon diodes with and without glue.
Both sections require an open circuit measurement.
This is done to allow subtraction of the parallel capacitance of the system.
To take this measurement the contact to the DUT is just broken.
In the case where the probes are used the probe is lifted a small amount
from the contact point.
Testing the Apparatus
To establish whether the apparatus would take accurate measurements of
depletion voltage and leakage current, tests on `simple' circuits where
The measurements of capacitance and of current were taken on different DUTs.
The DUTs chosen were resistors, resistors and capacitors in parallel,
capacitors, and basic silicon diodes.
Of all the DUTs, only the silicon diodes were able to sit on the vacuum chuck. Therefore a device was constructed to hold the DUT, and to allow both coaxial cables from the `box' to be connected. This can be seen in figure 5.3.
Figure 5.3: The device to hold awkward DUTs
The capacitance of the test silicon diodes can be derivedfrom their size.
This allows a choice of capacitor for the basic tests. The test diode has a plate area of 25 mm² and is 330 microns in depth. The capacitance, from equation 2.9, is therefore approximately 10 pF. A 10 pF capacitor was chosen for the readings.
The resistors chosen were of very large resistance, as the readings for the leakage current in the detector are very small. 500 MOhm, 1 MOhm and 100 kOhm resistors were used.
The three frequency test program was used to take the measurements.
The frequencies used where 10 kHz, 100 kHz and 1 MHz.
The results for these tests are listed in chapter 6.
Taking the Measurements on Silicon Devices
Two different set-ups where used.
The vacuum chuck method was used for the silicon wafers.
A method, described below, was used to take results for the glued DUTs.
It became apparent that this method produced results which fitted
those expected for the test diodes better than the vacuum chuck method.
This method was adopted for all subsequent measurements.
Measurements were made on several 25 mm² silicon diodes, on one silicon 25 mm² before and after gluing and on one strip detector diode.
The vacuum chuch set-up was used to take measurements of the silicon 25 mm² diode and the strip detector diode. The diodes were placed on the vacuum chuck and the probe placed close above the point of contact (in the case of the silicon strip detector, just above the strip being measured). The Labview three frequency test program was used. As and when required by the program the Faraday chamber was opened and the probe moved to make contact or break contact. This was only required at the beginning of the program.
The experiment ran unmanned after the computer had finished receiving information from open circuit readings. The results were collected and emailed within two hours. (It is possible to reduce this time by choosing a single frequency, lowering the accuracy and taking fewer results).
The gluing process was investigated by gluing a diode to a glass microscope
slide. The conditions before and after gluing must be identical, so the glass had to be present throughout.
Using the glass it was no longer possible to place the diode on the onto the vacuum chuck and have an electrical contact.
Another probe needle was used. This time the needle was bent upwards and made contact with the underside of the diode. The diode was placed on two sheets of glass, separated horizontally by about 1 mm so that the probe could make contact. This is shown in figure 5.4.
Figure 5.4: The glued diode set-up
with no ascertainable periodic information. The majority of these fluctuations were all of the same amplitude. The exact origin of this phenomenum is still unknown.
To combat this problem the size of the resistors in the box was changed to see if this would make an improvement. It caused no reduction in the signal to noise ratio.
The list sweep operation of the HP was then turned off to see if this reduced the errors. This resulted in the frequency of the fluctuation changing. The spikes on the current were further apart but still many results were spoiled.
The final change, which removed these spikes, was when an extra reset command was placed after the HP had taken its measurements. This rendered the HP in a state of basic configuration while the current measurements were taken.
The possible areas of conflict are talk between the HP and Keithley through the circuit or interference over the GPIB interface (The GPIB cables are at the maximum recommended length).
6 Data Analysis
Method for Data Analysis
The data arrives in the format shown in figure 6.1 over-leaf (below).
All text is tab delimited and so all the results can be read straight
into a spread sheet.
Such a spreadsheet was constructed. On receipt of data it calculates and ln|V| for each voltage. It takes the zero bias current from all current readings and take the open circuit capacitance from all the capacitances. The latter assumes that all parasitic capacitative effects are in parallel with the DUT.
All values of current are values through 660 kOhms of resistors as well as the DUT. The DUT `sees' a reduced potential difference due to the two 330 kOhms resistors in the purpose built guard box. The voltage across the DUT is therefore Vm - (I×660×10³) V, where Vm is the voltage across the DUT and guard box. In the low current situations where the equivalent DUT resistance is very high, the measured voltage is almost completely across the DUT. This is the case for the silicon diodes but not for the other DUTs.
A value for Vdep is measured where a change in the relationship between the capacitance and bias voltage is observed. This can be seen when the capacitance varies with either ln|V| or . See section 7.1 for a fuller discussion.
From Labview@hepmail.ph.man.ac.ukSun Oct 5 21:57:21 1997
Date: Tue, 16 Sep 1997 13:43:33 +0100 (BST)
strips at 10kHz
V I Cp G
0.000000E+0 5.730000E-12 654.591000E-15 -45.996700E-12
0.000000E+0 -4.430000E-12 946.797000E-15 7.682590E-9
0.000000E+0 1.580000E-12 934.552000E-15 6.366890E-9
-1.000000E+0 -52.180000E-12 913.420000E-15 2.527350E-9
-2.000000E+0 -80.280000E-12 963.638000E-15 4.157140E-9
-3.000000E+0 -85.060000E-12 2.624610E-12 233.909000E-9
-4.000000E+0 -111.870000E-12 7.281560E-12 258.546000E-9
Simple Test DUTs
The 100 kOhms Resistor DUT
Figure 6.2: A 100 kOhms resistor
From the current plot in figure 6.2 it can be seen that the device is ohmic. A resistance of 100/(133E-06) Ohms, which is 752 kOhms, was measured for the device and guard box. The DUT's resistance is calculated to be 91.9 kOhms, as the guard box has a resistance of 660 kOhms. This is constant over each HP frequency setting as expected. Value of Cp from the HP are very small due to the presence of no capacitors.
The 1 MOhms Resistor DUT
Figure 6.3: A 1 MOhms resistor
Figure 6.3 shows the expected ohmic response. The resistance of the DUT is (100/60E-6) - (660E+3) Ohms which gives 1.006 MOhms. The capacitance reading is negligible.
The 1 MOhms Resistor & 10 pF Capacitor in Parallel
Figure 6.4: MOhms and a 10 pF capacitor in parallel
Figure 6.4 shows the resistance, as expected, to be 1.006 MOhms. However, since there is a capacitor, Cp is evaluated as 10.216 pF, 10.227 pF and 10.269 pF for the 10 kHz, 100 kHz and 1 MHz HP settings respectively.
The 500 MOhms Resistor & 10 pF Capacitor in Parallel
Figure 6.5: A 500 MOhms and a 10 pF capacitor in parallel
Figure 6.5 shows the DUT's resistance to be 499.34 MOhms at 100 kHz and 1 MHz and 516.01 MOhms at 10 kHz. The capacitances are measured to be 10.153 pF for the 10 kHz setting, 10.142 pF for the 100 kHz and 10.147 pF for the 1 MHz setting with errors, calculated from equation A.1 in appendix A, of ±0.002 pF.
Silicon Test DUTs
The First Silicon 5 mm Square Diode
Figure 6.6: The silicon 5x5 diode No.1
It can be seen in figure 6.6 that the current readings are swamped by interference. These results have been taken without the corrections later added to the Labview program. For comments on this refer to section 5.3. The capacitative properties can easily be seen. Equation 2.9 gives an expected value of capacitance for this DUT as C = 7.89 pF when it is fully depleted, given that the area of the silicon is A = 25 mm² and its depth is measured, using a micrometer, to be D = 331 µm. As the bias voltage becomes greater than the depletion voltage the capacitance should take this value. It is measured to be 7.619 pF after depletion. The knee of the curves give a Vdep of about 27 V.
The Second Silicon 5 mm Square Diode
Figure 6.7: The silicon 5x5 diode No.2
Again these results were taken using the Labview program where the HP was active during the current readings. From figure 6.7 the maximum value for Vdep is measured to be 52 V from the graph and 44 V from the ln|V| graph. The knee is at a value of 33 V to 36 V. The capacitance at depletion is 7.857 pF.
The Third Silicon 5 mm Square Diode
Figure 6.8: The silicon 5×5 diode No.3
Figure 6.8: The silicon 5×5 diode No.3
Silicon DUTs Before and After Gluing
Glass Platform with Unglued Silicon 5 mm Square
Figure 6.9: The unglued silicon 5×5 diode on glass
The data in figure 6.9 have the characteristics expected for a diode. The leakage current of the diode is measured to be 1.603 µA. The capacitance is measured to be 9.52 pF. The depletion voltage is 26 V from the log scale and 22 V from the scale graph.
The Glued Silicon 5 mm Square Diode on Glass
Figure 6.10: The glued silicon 5×5 diode on glass
The 25 mm² silicon diode whose results are shown in figure 6.10 was measured with all the same conditions as the unglued silicon on glass diode on the previous page as well as having been glued to a glass plate. The depletion voltage is measured to be 29 V on the log graph and 28 V on the graph. The capacitance at depletion is 11.4 pF The leakage current now varies over the range 1.5 to 4 µA with the 1 MHz and 100 kHz test signals and 1.5 to 2.5 µA with the 10 kHz test signal.
The Fourth Silicon 5 mm Square Diode
Figure 6.11: The silicon 5x5 diode No.4
These data (shown in figure 6.11) were taken using the glass slide technique. This was done because the results from the diode in the gluing experiment had better characteristics. The figure depletion voltage for the fourth diode is 21 V and 22 V from the two graphs the latter being from the logarithm graph. The capacitance, 11.11 pF, is sensible. The leakage current is 1.5 µA tailing off to 2 µA at high voltages. All consequent data has been taken using the two probe method.
Silicon Strip 1
Figure 6.12: The silicon 10 micron strip detector (4 cm long)
Figure 6.12 shows the data taken whilst measuring the 10 micron strips on the wafer shown in figure 6.13. This was done using the two probe method. This device only has structure on the top side where the strips are. The depletion voltage is measured to be 20 V. The leakage current is measured to be 4.5 nA. The capacitance, at depletion, is measured to be 8.21 pF.
Figure 6.13: The silicon 10 micron strip detector No.1
Silicon Strip 2
Figure 6.14: The silicon 10 micron strip detector (3.8 cm long)
Another silicon strip diode (figure 6.15) was measured. This was done using the two probe method. This device only has structure on the top side where the strips are. From data shown in figure 6.14 the depletion voltage is measured to be 57 V for the 1 MHz reading and 61 V for the 10 kHz reading. The leakage current is measured to be 1.43 µA. The capacitance, at depletion, is measured to be 3.148 pF. The leakage current increases with the bias voltage below -60 V this could be the start of the diode reverse-bias-breakdown (see figure 2.2).
Figure 6.15: The silicon 10 micron strip detector No.2
Measurement of Depletion Voltage
To find the value of depletion voltage for a silicon diode the data from
the measurements of capacitance over the range of voltages must be analysed.
These data fit two lines.
The solution satisfying both of these lines (the knee)
is difficult to find with good accuracy.
The line where the capacitance is constant is an easy fit because of its
but the varying capacitance line appears to fit sometimes two different lines.
Some thought into the data analysis of this fit may be required for better
Computer Code Development
All the code described in this thesis works enough to cover
the measurements taken.
However, the program "Test4ThreeFrequencies.vi" was constructed loosely.
Running this code requires the user to place a contact onto the DUT
two times more than necessary.
Also, when running the log scale result taking routine there is
one extra result taken than is requested.
To save time both these faults can be rectified.
This can be done with relative ease.
To test the silicon strips that have been irradiated the temperature of the
silicon strip must be kept below -5°C.
As mentioned earlier the silicon wafer would form ice crystals on its surface
by condensing the water vapour out of the gas surrounding the diode.
A way to enclose the DUT within its own dry atmosphere would have to be found.
A possible solution might be to fit the probe station inside a glove box
and fill this with nitrogen gas.
The objective of this thesis has been reached.
The set-up will measure leakage currents to an accuracy of ±0.01 nA,
and depletion voltages to an accuracy of about ±1 V extracting data by eye.
The apparatus developed has been tested. A labview program has been developed to control all the operation except the physical movement of devices and probes, and the data analysis.
The gluing process was tested and a change in the characteristics of the leakage current was observed. The leakage currents measured after the gluing process were larger than those measured before gluing. The ammount by which the I-V characteristics depart from those measured before gluing increase with bias voltage.
The leakage current for a silicon strip from a test device has been measured to be 1.40±0.01 nA and the depletion voltage measured was 57±1 V.
A Accuracy of the HP4284A
The accuracy of the HP 
for the measurements recorded in this thesis is given by
This applies to values of Z, Y, L, C, R, B, X and G (when measuring G&B together). Errors for D, Q, , G (in all other cases), Rp and Rs can be calculated as follows:
This gives an error for C as ± 2e-4% and D as ± 2e-6 for a 10 pF capacitor.
B Labview Coding for Experiment Control
The following diagrams are print-outs from the higher level Labview programs.
They are intended for those who know the language.
The following programs are listed: Test4ThreeFrequencies.vi, VICSubVi.vi,
Kth-SvMi_Main.vi, and HP_getdata_main.vi.
Figure B.1: Test4ThreeFrequencies.vi (part 0)
Figure B.1: Test4ThreeFrequencies.vi (part 0)
Figure B.2: Test4ThreeFrequencies.vi (parts 1, 2 & 3)
Figure B.2: Test4ThreeFrequencies.vi (parts 1, 2 & 3)
Figure B.3: VICSubVi.vi (part 0)
Figure B.3: VICSubVi.vi (part 0)
Figure B.4: VICSubVi.vi (part 1)
Figure B.4: VICSubVi.vi (part 1)
Figure B.5: VICSubVi.vi (part 2)
Figure B.5: VICSubVi.vi (part 2)
Figure B.6: VICSubVi.vi (part 3)
Figure B.6: VICSubVi.vi (part 3)
Figure B.7: VICSubVi.vi (part 4)
Figure B.7: VICSubVi.vi (part 4)
Figure B.8: VICSubVi.vi (parts 5 & 6)
Figure B.8: VICSubVi.vi (parts 5 & 6)
Figure B.9: Kth-SvMi_Main.vi (part 1)
Figure B.9: Kth-SvMi_Main.vi (part 1)
Figure B.10: Kth-SvMi_Main.vi (parts 2 & 3)
Figure B.10: Kth-SvMi_Main.vi (parts 2 & 3)
Figure B.11: HP_getdata_main.vi
Figure B.11: HP_getdata_main.vi